Pulsic’s Spine Routing option provides specialist tools to achieve optimal linear spine routing in DRAM/SRAM and Flash memory designs. Ideal for handling the wide aspect ratios found in memory layout, the solution is well-suited to routing where layer numbers are highly restricted and control of highly resistive layers is required.
Spine routing and stitching
Route peripheral logic between memory cores ― including jumpers for switch-box areas ― to quickly achieve optimal linear spine routing.
Boost productivity and yield
Combine Pulsic’s Spine Routing option with UniEdit to eliminate the time-consuming manual layout of peripheral logic, or use it with UniPlace to compact channels and produce the optimally smallest die size. When coupled with UniRoute, yield and DFM issues are improved ― both of which are crucial requirements for today’s memory designs.
See also: UniRoute