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Products & Solutions


  • Gets designers up to speed rapidly with minimal training and setup
  • Reduces layout time from days or weeks to minutes
  • Enables exploration of multiple architectures and extraction of realistic parasitics
  • Creates manual-quality results in a fraction of the time
  • Enables accurate simulation early in the design process
  • Uses native OpenAccess and PCells or PyCells


  • Easy-to-use GUI
  • Automatic constraint recognition from schematics
  • Unique Polymorphic Layout technology generates multiple electrically correct layouts ranked by user-specified criteria
  • Supports CMOS analog (area-based) designs
  • Supports flat or hierarchical designs