Pulsic in the News

Pulsic offers real-time analog chip layout preview in schematic editor
Embedded

3 February 2021

Is Automated Analog Layout Finally a Reality?
Electronic Design

29 May 2019

Blog: Automating Analog Layout
Planet Analog

7 May 2019

Customer review: “Pulsic amazed me with a tool called Animate”
Deepchip

10 April 2017

Electrically Correct Analog Layout
Planet Analog

18 March 2017

Constraint-driven Analog Placement and Routing
Planet Analog

9 October 2015

Analog's Day of Reckoning
Semi Engineering

15 June 2015

Using Deep N Wells in Analog Design
Planet Analog

6 May 2015

Latchup and its prevention in CMOS
Planet Analog

14 January 2015

Layout-Dependent Effects in Analog Design
Planet Analog

8 October 2014

Power Routing in Analog Design
Planet Analog

1 September 2014

Improving Analog Design Time
Planet Analog

8 July 2014

Analog Breakthrough?
Pulsic Automates Analog Layout
EE Journal

6 July 2014

Matching in Analog Layout
Planet Analog

19 May 2014

Is It Time for Custom Design Tools to Catch Up With Digital?
Planet Analog

17 April 2014

Analog Layout Automation: An Unsolved Problem
Planet Analog

8 July 2013

Pulsic: the bleeding edge of custom IC design
EDN

14 November 2012

Driving in the bus lane
SemiWiki.com

11 August 2012

Pulsic Adds Guided Flows
EE Journal

30 May 2012

After Planning Comes Implementation for Pulsic
SemiWiki.com

23 May 2012

Pulsic to introduce analog and custom digital place and route
EE Times

21 May 2012

Channel Routing Memories
SemiWiki.com

22 April 2012

Top-level Custom Signal Planning and Routing
EE Times

20 February 2012

New Unity Signal Planner and Router for Custom Designs
EDA Café

1 February 2012

Pulsic Whitepaper - A Practical and Reliable Methodology for Hierarchical Signal Planning
Pulsic.com

31 January 2012

The Requirements of Today's Custom Signal Planning Methodologies
SemiWiki.com

19 September 2011

Automatic shape-based routing to achieve parasitic constraint closure in custom design
EE Times

1 September 2011

Constraints open new EDA standards battleground
EE Times

4 July 2011

What will it take for next generation routing to meet the needs of the most advanced process nodes and beyond
EDA Café

31 May 2010

Current Top-down approach for Mixed-Signal Design isn't good enough, Pulsic Pushes the boundaries of Mixed Signal Layout Design Domains <<Japanese>>
EDA Online - Tech-on

31 January 2010

Move to 32nm could force design change for chips
Electronics Weekly

19 March 2008

Pulsic licenses flash design tool to Saifun
Electronics Weekly

14 October 2007

Pulsic, S3 and Runcom lead company search ranking
EE Times

13 September 2007

Pulsic's Custom Design Automation Solution to be Displayed at Flash Memory Summit
EDA Café

6 August 2007

EDA looks to two good years in a row
EE Times

31 July 2007

Pulsic appoints former Cadence Japan exec to advisory board
EE Times

10 July 2007

EDA 07 forecast: strong, but watch the bumps
EE Times

1 February 2007

Rocketing sales take Pulsic to top three
Electronicstalk

28 September 2006

Imperas tops analyst Smith's watch list
EE Times

23 July 2006

Oki uses Pulsic router to reduce layout design time
EE Times

12 July 2006

Ness, Pulsic set up India development center
EE Times

28 June 2006

Pulsic announces Unity physical design software
EE Times

25 June 2006

IC design software adds advanced placement
Electronicstalk

26 April 2006

Pulsic adjusts EDA tool in response to customers
EE Times

26 April 2006

EDA luminaries join Pulsic advisory board
Embedded

15 November 2005

INDUSTRY GADFLY: "My Cheesy Must See List for DAC 2005"
Deep Chip

8 June 2005

Pati joins Pulsic board
Embedded

14 April 2005

Numerical Technologies' founder joins board of EDA startup
EE Times

13 April 2005

Elixent uses Pulsic router for reconfigurable fabric ports
EE Times

22 February 2005

DEATH TO VIRTUOSO! (Part III)
Deep Chip

9 February 2005

Pulsic Secures $5.5M First Round Investment
EDA Café

15 January 2003

New IC Routing Start-up Company - Pulsic - is Officially Announced
EDA Café

18 January 2002

Gridless IC router shapes up with combined effort
EE Times

16 January 2002

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