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STARC Certifies Pulsic’s Unity Analog Router as Auto-routing Tool in STARC Analog/Mixed-signal IP Reuse Reference Flow

Unity Analog Router has met STARC criteria for constraint-driven auto-routing

SAN JOSE, CA – March 26th, 2013 — In March 2011, Pulsic announced that the company’s Unity™ Analog Router had been selected by STARC, the Japanese electronic design consortium co-founded by major Japanese semiconductor companies, for the STARCAD-AMS analog/ mixed-signal reference flow. Pulsic’s Unity Analog Router was the routing solution to meet STARC’s criteria for next-generation routing. Two years later, Pulsic, the premier provider of physical design tools for precision design automation, has been able to meet the design turnaround time goal of a 50% reduction within the STARC Analog IP Reuse Design Flow without losing the high quality of layout through respin.

Unity Analog Router harnesses various shape-based routing solutions for the custom, analog and mixed-signal markets, and supports the most complex design rule sets and advanced node technologies. A new concept in automatic and interactive routing for analog integrated circuits (ICs), Pulsic’s routing solution delivers a simple, easy-to-use, guided flow that delivers DRC-correct routing and completes routing patterns and topologies that an experienced analog designer would create when routing the layout by hand.

“STARC has been developing an Analog IP Reuse Design Flow since 2011, and our target was to reduce the design turnaround time (TAT) by one-half versus the current method of manual reworking. Auto-routing functionality is one of the most significant steps in the flow for reducing that rework time and Pulsic’s Unity Analog Router has completely cleared all of the STARC criteria as a constraint-driven auto router. We have surpassed the target reduction of design TAT while maintaining the high quality of layout. We are very satisfied with the results,” said Kunihiko Tsuboi, STARC’s senior manager for the mixed-signal design group.

Today’s advanced analog designs continue to grow in size and complexity, which magnifies the already labor-intensive task of analog routing and calls on all the skills of the layout designer to achieve the desired quality results. This increasing complexity, coupled with ever shorter time-to-market windows, has really driven the need to use automation to facilitate the reuse of the proven design elements as quickly as possible without compromising on layout quality. However, analog routing tools that have been tried previously have always had some drawbacks: They only automate parts of the process; they are difficult to set up and learn; and they focus solely on 100% completion and DRC/LVS correctness paying little or no attention to the quality of the result.

Unity Analog Router overcame these challenges for STARC by:

  • Providing a flexible and scalable user interface and a flow-based GUI.
  • Creating high-quality symmetry, shield and electro migration routing (implementing constraints reused from existing designs).
  • Considering cell location and many constraints, freeing the user from detailed setup, making similar layout patterns easy to import to new designs.

Leveraging IP reuse design methodology, the Unity Analog Router reduced the design time for the STARC switched capacitor by over 59%.

The benchmark for the STARC Analog IP Reuse Design Flow was validated on an OpenAccess database with Cadence’s IC6.1.5 (OA) environment.

“Layout designers have never been satisfied with the results generated by auto routers that only consider design rules and constraints. Unity Analog Router creates designs with methodologies and concepts that experienced analog designers would use when routing by hand,” said Fumiaki Sato, Pulsic’s co-founder and vice president of business development. “Pulsic’s shaped-based routing technologies have been the leading routing tools for analog IC automation for more than ten years, and we look forward to continuing that tradition of innovation.”

About STARC
The Semiconductor Technology Academic Research Center (STARC) was founded in December 1995 by Japan’s leading semiconductor manufacturers to strengthen their design competitiveness. STARC has since collaborated with universities to expand the semiconductor research infrastructure at Japanese universities, arranged system-on-chip (SOC) design seminars through cooperation between industry and academia to train specialized chip architects, and collectively worked with client companies to develop a suite of technology enablers to address design difficulties compounded by shrinking technology nodes. The results of these projects have been put to good use within the semiconductor industry. For more information http://www.starc.jp/index-e.html

About Pulsic
Pulsic is an electronic design automation (EDA) company offering production-proven chip planning and implementation solutions for extreme design challenges at advanced nodes. Leading semiconductor companies use Pulsic’s physical design software to achieve significant improvements in their design productivity through layout automation using Pulsic’s advanced solutions. Complementary to existing design flows, standards, and databases, Pulsic technology delivers handcrafted quality faster than manual design or other EDA software solutions. Pulsic has delivered successful tapeouts for IDMs and fabless customers in the memory, FPGA, custom digital, LCD, imaging, and AMS markets worldwide. For more information, please visit http://www.pulsic.com

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Unity, Pulsic Implementation Solution, and Unity Analog Router, are trademarks of Pulsic Limited. Any other trademarks or trade names mentioned are the property of their respective owners.

Media Contact:
Michelle Clancy, Cayenne Communication LLC — 252-940-0981, michelle.clancy@cayennecom.com

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