A Practical and Reliable Methodology for Hierarchical Signal Planning
Traditional signal and bus planning approaches for custom and AMS IC designs have reached practical limits. Manually partitioning large custom designs into discrete hierarchical blocks fails to address the complexities of top level routing, block level routing, and block level pin placement while industry standard digital automated routers aren’t optimized to resolve unique custom IC design challenges
This paper describes a proven methodology that uses custom design tools to efficiently and reliably complete full chip signal planning in hierarchical custom and AMS designs.
Automatic Shape-Based Routing to Achieve Parasitic Constraint Closure in Custom Design
Each smaller sub-micron process technology brings a new set of physical problems for IC designers. Among the toughest of these problems are meeting electrical parasitic constraints and minimizing signal integrity issues in the interconnect routing while still reaching routing completion, controlling power consumption, staying within the specified die-size and speeding time to market. For digital designs, some of these concerns are addressed by automatic place and route tools. However, for custom IC designs, these issues remain largely unaddressed due to the inadequacy of the automation tools. In addition to custom design tools and flows, there is a need for standardization of data, including design constraints, an effort which is starting to gain momentum at the industry level.
The Next Roadblock to Custom Design Productivity: Design Constraints
Design constraints, which express design intent, are one of the pieces of ancillary data that are critical to the success or failure of a custom design. Design constraints aren’t usually contained within layout files or library information, but without these critical data, designs may not meet specifications. Today, most custom design teams manage constraints in ad-hoc, manual fashions. This ad-hoc approach has become a significant limitation when it comes to automating the custom design process, which in turn can limit both design productivity and accuracy. Moving forward, the custom design community is starting to look to standards efforts to ease the burden of correlating and communicating design constraints throughout the design process.
Tips and Pitfalls:
Maximizing Custom Design Tool Interoperability and Choice through OpenAccess
The promise of OpenAccess is simple but powerful: standard interoperability and the ability to use best-in-class tools, regardless of supplier. However, users sometimes experience less interoperability than expected, and find that their choices are more limited than they had imagined. Often, this is caused by choices users make as they migrate from proprietary database formats to OpenAccess. This paper will discuss several common migration pitfalls that can cause custom design teams to experience a lower-than-expected level of interoperability. It will also provide tips to help maximize interoperability, and thus tool choice, for their custom designs through their migration to OpenAccess.
EDN ( November 14, 2012)
December 13, 10:30am – 1:00pm
EEJournal (May 31, 2012)
SemiWiki.com (May 24, 2012)
EETimes (May 22, 2012)